? semiconductor components industries, llc, 2006 april, 2006 ? rev. 5 1 publication order number: nif62514/d nif62514 preferred device self?protected fet with temperature and current limit hdplus devices are an advanced series of power mosfets which utilize on semiconductor?s latest mosfet technology process to achieve the lowest possible on?resistance per silicon area while incorporating smart features. integrated thermal and current limits work together to provide short circuit protection. the devices feature an integrated drain?to?gate clamp that enables them to withstand high energy in the avalanche mode. the clamp also provides additional safety margin against unexpected voltage transients. electrostatic discharge (esd) protection is provided by an integrated gate?to?source clamp. features ? current limitation ? thermal shutdown with automatic restart ? short circuit protection ? low r ds(on) ? i dss specified at elevated temperature ? avalanche energy specified ? slew rate control for low noise switching ? overvoltage clamped protection ? pb?free packages are available mosfet maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain?to?source voltage internally clamped v dss 40 vdc drain?to?gate voltage internally clamped (r gs = 1.0 m ) v dgr 40 vdc gate?to?source v oltage v gs 16 vdc drain current ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? pulsed (t p 10 s) i d i d i dm internally limited total power dissipation @ t a = 25 c (note 1) @ t a = 25 c (note 2) @ t a = 25 c (note 3) p d 1.1 1.73 8.93 w thermal resistance, junction?to?tab junction?to?ambient (note 1) junction?to?ambient (note 2) r jt r ja r ja 14 114 72.3 c/w single pulse drain?to?source avalanche energy (v dd = 25 vdc, v gs = 5.0 vdc, v ds = 40 vdc, i l = 2.8 apk, l = 80 mh, r g = 25 ) e as 300 mj operating and storage temperature range t j , t stg ?55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. mounted onto min pad board. 2. mounted onto 1 pad board. 3. mounted onto large heatsink. 6.0 amperes* 40 volts clamped r ds(on) = 90 m m pwr drain source temperature limit gate input current limit current sense r g overvoltage protection esd protection http://onsemi.com preferred devices are recommended choices for future use and best overall value. *limited by the current limit circuit. sot?223 case 318e style 3 1 marking diagram 1 ayw 62514 a = assembly location y = year w = work week 62514 = specific device code = pb?free package 2 3 4 (note: microdot may be in either location) gate drain source drain see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 2 3 4
nif62514 http://onsemi.com 2 mosfet electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain?to?source clamped breakdown voltage (v gs = 0 vdc, i d = 250 adc) (v gs = 0 vdc, i d = 250 adc, t j = 150 c) v (br)dss 42 42 46 45 50 50 vdc zero gate voltage drain current (v ds = 32 vdc, v gs = 0 vdc) (v ds = 32 vdc, v gs = 0 vdc, t j = 150 c) i dss ? ? 0.5 2.0 2.0 10 adc gate input current (v gs = 5.0 vdc, v ds = 0 vdc) (v gs = ?5.0 vdc, v ds = 0 vdc) i gss ? ? 50 550 100 1000 adc on characteristics gate threshold voltage (v ds = v gs , i d = 150 adc) threshold temperature coefficient (negative) v gs(th) 1.0 ? 1.7 4.0 2.0 6.0 vdc mv/ c static drain?to?source on?resistance (note 4) (v gs = 10 vdc, i d = 1.4 adc, t j @ 25 c) (v gs = 10 vdc, i d = 1.4 adc, t j @ 150 c) r ds(on) ? ? 90 165 100 190 m static drain?to?source on?resistance (note 4) (v gs = 5.0 vdc, i d = 1.4 adc, t j @ 25 c) (v gs = 5.0 vdc, i d = 1.4 adc, t j @ 150 c) r ds(on) ? ? 105 185 120 210 m source?drain forward on voltage (i s = 7 a, v gs = 0 v) v sd ? 1.05 ? v switching characteristics turn?on delay time 10% v in to 10% i d r l = 4.7 , v in = 0 to 10 v, v dd = 12 v t d(on) ? 4.0 8.0 s turn?on rise time 10% i d to 90% i d r l = 4.7 , v in = 0 to 10 v, v dd = 12 v t rise ? 11 20 s turn?off delay time 90% v in to 90% i d r l = 4.7 , v in = 10 to 0 v, v dd = 12 v t d(off) ? 32 50 s turn?off fall time 90% i d to 10% i d r l = 4.7 , v in = 10 to 0 v, v dd = 12 v t fall ? 27 50 s slew?rate on r l = 4.7 , v in = 0 to 10 v, v dd = 12 v ?dv ds /dt on ? 1.5 2.5 s slew?rate off r l = 4.7 , v in = 10 to 0 v, v dd = 12 v dv ds /dt off ? 0.6 1.0 s self protection characteristics (t j = 25 c unless otherwise noted) current limit (v gs = 5.0 vdc) (v gs = 5.0 vdc, t j = 150 c) i lim 6.0 3.0 9.0 5.0 11 8.0 adc current limit (v gs = 10 vdc) (v gs = 10 vdc, t j = 150 c) i lim 7.0 4.0 10.5 7.5 13 10 adc temperature limit (turn?off) v gs = 5.0 vdc t lim(off) 150 175 200 c temperature limit (circuit reset) v gs = 5.0 vdc t lim(on) 135 160 185 c temperature limit (turn?off) v gs = 10 vdc t lim(off) 150 155 185 c temperature limit (circuit reset) v gs = 10 vdc t lim(on) 130 140 170 c esd electrical characteristics (t j = 25 c unless otherwise noted) electro?static discharge capability human body model (hbm) esd 4000 ? ? v electro?static discharge capability machine model (mm) esd 400 ? ? v 4. pulse test: pulse width = 300 s, duty cycle = 2%.
nif62514 http://onsemi.com 3 typical electrical characteristics 3 v 7 v 3 v 0 4 6 1 4 2 i d, drain current (amps) 0 8 2 3 5 135 0 8 6 2 4 2 i d, drain current (amps) 0 v ds , drain?to?source voltage (volts) figure 1. output characteristics figure 2. output characteristics 0 10 8 6 4 2 1.5 1 2 12 0 0.5 2.5 3 3.5 figure 3. output characteristics v gs , gate?to?source voltage (volts) figure 4. transfer characteristics i d, drain current (amps) figure 5. drain?to?source resistance versus junction temperature figure 6. drain?to?source resistance versus junction temperature 12 v gs = 10 v v ds , drain?to?source voltage (volts) 4 6 10 135 5 v t j = 25 c t j = 150 c 4 4.5 5 4 v 0 8 6 2 4 2 i d, drain current (amps) 0 14 4 6 10 135 v ds , drain?to?source voltage (volts) t j = ?40 c v gs = 10 v 125 t j , junction temperature ( c) r ds(on) , drain?to?source resistance (m ) ?50 50 75 25 0 100 ?25 125 50 150 25 100 0 175 250 75 150 v gs = 10 v i d = 1.4 a maximum typical v ds = 5 v t j = 25 c t j = ?40 c 6 v 7 v t j = 150 c v gs = 10 v 5 v 4 v 6 v 6 7 12 3 v 5 v 4 v 6 v 7 v 200 225 125 t j , junction temperature ( c) r ds(on) , drain?to?source resistance (m ) ?50 50 75 25 0 100 ?25 125 50 150 25 100 0 175 250 75 15 0 v gs = 5 v i d = 1.4 a maximum typical 200 225
nif62514 http://onsemi.com 4 t j , junction temperature ( c) 1.00 0 figure 7. drain?to?source resistance versus junction temperature figure 8. gate threshold voltage versus temperature temperature ( c) gate threshold voltage (v) ?50 70 10 ?10 ?30 90 130 v ds = 32 v 150 30 50 110 ?50 25 50 075 ?25 100 1 2 0 4 150 typical i dss , drain?to?source leakage current ( a) 0.25 125 3 0.50 0.75 1.25 1.50 1.75 2.00 2.25 2.50 v th + 4 sigma v th ? 4 sigma v th i d = 150 a 0 figure 9. short?circuit response time (ms) drain current (amps) 3 05 12 4 2 4 6 8 10 12 current limit temperature limit v gs = 10 v v gs = 5 v t,time (s) figure 10. transient thermal resistance (non?normalized junction?to?ambient mounted on minimum pad area) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 d curves apply for power pulse train shown read time at t 1 t j(pk) ? t a = p (pk) r ja (t) r jc r(t) for t 0.02 s 0.00001 0.0001 0.001 0.01 0.1 1 1 0 100 10 1 0.1 r(t), transient thermal resistance ( c/w) single pulse duty cycle = 0.5 0.02 0.01 0.05 0.1 0.2
nif62514 http://onsemi.com 5 ordering information device package shipping ? nif62514t1 sot?223 1000 / tape & reel NIF62514T1G sot?223 (pb?free) nif62514t3g sot?223 (pb?free) 4000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
nif62514 http://onsemi.com 6 package dimensions sot?223 (to?261) case 318e?04 issue l style 3: pin 1. gate 2. drain 3. source 4. drain a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint* h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 nif62514/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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